Critical embedded applications in avionics, automotive, rail, defense, nuclear and medical industries are facing to an exponential demand for performance, while providing guarantees of dependability and reliability.
To meet these performance needs, manufacturers are led to use chips with multiple processors cores, which offer the advantage of providing a massive computing power. But the level of integration of these processors makes them more sensitive to radiations of natural origin (storm, high temperature, etc.) or artificial. The reliability of a system based on multi-core processors, in particular its reliability when it controls critical functions, becomes very problematic under these conditions.
In summary, this project addresses the problem of circuit resistance to singular events -SEU- (failure of an electronic component induced by a single particle) caused by radiation of natural origin (as defined in IEC 62396) or artificial radiation. The effects of these radiations may jeopardize the progress of a mission (including at ground level) after occurrence of faults in the hardware and therefore errors in the application. In the same logic, this project also addresses the development and verification methods covered by the DO-254 and DO-178B / Eurocae ED-12B standards on the certification of avionics electronic equipment, particularly those related to FPGAs and multi processors cores.
The protection and hardening of civil and military components based on embedded systems that manage critical processes and systems. The economic spin-offs are at the level of the French and European Equipment Manufacturers who will be able to promote more efficient and safer embedded systems with the possibility of going faster and further than the competition. This project also supports French industry by enhancing the economic microcosm of this sector.
The innovation concerns the development of a methodology and associated tools to raise the level of hardening of embedded systems, and this, considering physical faults reflecting the reality of the system environment. It will thus be possible for an industrial company to quantify the risks of faults in a given context, to choose the best architecture for its application and to provide proof of fault resistance thanks to the physical tests performed on a hardware platform.
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